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changeFPGALinks

changeFPGALinks

Overview

  • ThechangeFPGALinkscommand line tool works directly on the FPGA-Nodes during a running job.

  • When the tool returns, the topology is changed to the requested one.

  • The tool output can also be used as a quick and handy way to visualize the current configuration with the FPGA-Link-GUI.

  • You can run the tool multiple times within the same job to sequentially create and use different topologies.

  • After changing the topology, make sure to reset or reprogram your FPGA designs. Otherwise the network interfaces may get stuck in an undefined state.

Usage in Interactive Jobs

Preparation

First submit a job with a fitting constraint either for the Alveo U280 nodes or the Bittware 520N nodes. Here interactively with srun for an Alveo U280 node:

fpga-tester@n2login1:~ $ srun -A <your_project> --constraint=xilinx_u280_xrt2.15 -N 1 -p fpga -t 2:00:00 --pty zsh

or for an Bittware 520N node with _max Constraint:

fpga-tester@n2login1:~ $ srun -A <your_project> --constraint=bittware_520n_20.4.0_max -N 1 -p fpga -t 2:00:00 --pty zsh

In both cases, next load the module:

fpga-tester@n2fpga17:~ $ module load fpga/changeFPGAlinks

Then you can run the commandchangeFPGAlinks. The command names might be subject to changes in the near future. You can run the command to specify a new topology, or run it without topology arguments to check the current status.

Examples for running the tool interactively without a topology

This will only generate a overview and not change anything, but can be useful for documenting the current status:

If a topology has already been created:

Visualize here: Click!

Examples for running the tool interactively to specify a topology

with the --fpgalink= syntax to set the links:

Connect for 3 Xilinx Alveo U280 cards within a single node the respective first port to the Ethernet switch as shown here:

Create a point-to-point loopback configuration for 2 Bittware 520N cards within one node as shown here:

Create a customized point-to-point ring for 3 Xilinx Alveo cards within one node as shown here:

Usage in Batch Mode

Using the batch script fpgaLinkMulti.sh

Sample output - note that we are invoking the test with srun on all nodes concurrently and still write to the same slurm log file, so output of the second phase is likely to be out of order and interleaved:

 

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