Comparison of FPGA Software and Firmware Stacks

This table provides an overview how the components for the different target platforms and development tools relate to each other.

Entries with ml <name> show modules that need to be loaded both for development and hardware execution with the respective FPGA platform and development tool. Here specific version names are omitted, which loads always the latest version of the module.

FPGA Platform		Xilinx Alveo U280 with Virtex Ultrascale+ FPGA	Bittware 520N with Stratix 10 FPGA
Development Tool	This contains the compiler with high-level-synthesis features, report generation, and an emulator for testing. New optimizaiton features depend mostly on this tool.	Xilinx Vitits `ml xilinx/vitis`	Intel oneAPI `ml intel/oneAPI`	Intel FPGA SDK for OpenCL `ml intel/opencl_sdk`
FPGA Synthesis Backend	This translates and maps your design to a bitstream, roughly the FPGA counterpart to an assembler in the CPU world. Since the FPGA backend has millions of registers, lookup tables and wires to chose from, this process takes a long time.	Xilinx Vivado, version selected and automatically loaded along with Vitis (above).	Intel Quartus, version selected and automatically loaded along with the BSP (below).	Intel Quartus, version selected and automatically loaded along with the BSP (below).
FPGA Shell	This component is configured on the FPGA and provides base funtionality like PCIe, and DDR or HBM2 controllers.	Xilinx shell `ml xilinx/u280`	Part of Bittware Board Support Package (BSP), available with (`_max`) and without (`_hpc`) external channels for direct FPGA-to-FPGA communication. `ml bittware/520n (module combines FPGA shell and driver)`
Device Driver	This is a software component that controls the interaction with the FPGA shell.	Xilinx XRT `ml xilinx/xrt`	Part of Bittware Board Support Package (BSP), available with (`_max`) and without (`_hpc`) external channels for direct FPGA-to-FPGA communication. `ml bittware/520n (module combines FPGA shell and driver)`
Rules		A specific coupling of XRT and Vitis versions is recommended and automatically resolved by the modules (version strings don’t match). Multiple pairs of XRT+Vitis can use the same shell. Xilinx Vitis, XRT and U280 shell versions	Development tools need a sufficiently recent BSP version to work with. Intel OpenCL SDK to BSP Mapping
Node Allocation Constraint	When you submit a job into the fpga partition for hardware execution, with this contraint you request a fitting FPGA platform, shell and driver. You still need to load the corresponding modules. For synthesis and emulation, no constraint is needed, but you need to use the same modules as for later hardware execution.	Constraints named by FPGA card and xrt Version `--constraint=xilinx_u280_xrt2.12`	Constraints named by FPGA card and BSP version, with suffix for external channel configuration `--constraint=bittware_520n_20.4_max`
Quick Start Guides	These guides show how to get started with the platform and tool combination outlined in the corresponding column.	Xilinx Vitis Quick Start Guide	Intel oneAPI Quick Start Guide	Intel OpenCL Quick Start Guide