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Intel Quartus, version selected and automatically loaded along with the BSP (below

FPGA Platform

Xilinx Alveo U280 with

Virtex Ultrascale+ FPGA

Bittware 520N with

Intel Stratix 10 FPGA

Development Tool

This contains the compiler with high-level-synthesis features, report generation, and an emulator for testing. New optimizaiton features depend mostly on this tool.

Xilinx Vitits

ml xilinx/vitis

Intel oneAPI

ml intel/oneAPIoneapi

Intel FPGA SDK for OpenCL

ml intel/opencl_sdk

FPGA Synthesis Backend

This translates and maps your design to a bitstream, roughly the FPGA counterpart to an assembler in the CPU world. Since the FPGA backend has millions of registers, lookup tables and wires to chose from, this process takes a long time.

Xilinx Vivado, version selected and automatically loaded along with Vitis (above).

).

Intel Quartus, version selected and automatically loaded along with the BSP (below).

FPGA Shell

This component is configured on the FPGA and provides base funtionality like PCIe, and DDR or HBM2 controllers.

Xilinx shell

ml xilinx/u280

Part of Bittware’s Board Support Package (BSP).

ml bittware/520n

Module combines FPGA shell and device driver.

Available with external channels (suffix _max) and without (suffix _hpc) for direct FPGA-to-FPGA communication.

Device Driver

This is a software component that controls the interaction with the FPGA shell.

Xilinx XRT

ml xilinx/xrt

Rules

This contains rules how suitable software and firmware stacks can be selected, if required.

A specific coupling of XRT and Vitis versions is recommended and automatically resolved by the modules (version strings don’t match). Multiple pairs of XRT+Vitis can use the same shell. Xilinx Vitis, XRT and U280 shell version combinations

Development tool needs a sufficiently recent, but not newer BSP version to work with. Intel oneAPI versions and Bittware BSP version combinations

Development tool needs a sufficiently recent, but not newer BSP version to work with. Intel FPGA SDK for OpenCL and Bittware BSP version combinations

Node Allocation Constraint

When you submit a job into the fpga partition for hardware execution, with this constraint you request a appropriately configured FPGA platform, shell and driver. You still need to load the corresponding modules. For synthesis and emulation, no constraint is needed, but you need to use the same modules as for later hardware execution.

Constraints named by FPGA card and driver (XRT) version

--constraint=xilinx_u280_xrt2.12

Constraints named by FPGA card and shell/driver (BSP) version, with suffix for external channel configuration

--constraint=bittware_520n_20.4.0_max

Quick Start Guides

These guides show how to get started with the platform and tool combination outlined in the corresponding column.

Xilinx Vitis Quick Start Guide

Intel oneAPI Quick Start Guide

Intel OpenCL Quick Start Guide

Vendor Tool Documentation

For the detailed documentation on using the development tools, we refer to the vendor documentation. Links to the respective overview pages and the actual technical guide(s) that are most fitting if you want to start an FPGA project.

Xilinx Vitis Overview Page

Xilinx UG1393 Vitis Application Acceleration

Intel oneAPI Overview Page

Intel oneAPI DPC++ FPGA Optimization Guide

Intel FPGA SDK for OpenCL Overview Page

Intel FPGA SDK for OpenCL Programming Guide

Intel FPGA SDK for OpenCL Best Practices Guide

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