| ||||||||
---|---|---|---|---|---|---|---|---|
20.4.0_max/_hpc | 19.4.0_max/_hpc | 19.2.0_max/_hpc | 19.1.0 | 18.1.1_max/_hpc | 18.0.1 | 18.0.0 | ||
| 21.4.0 | yes | ||||||
21.3.0 | yes | |||||||
21.2.0 | yes | |||||||
21.1.0 | yes | |||||||
20.4.0 | yes | yes | yes | yes | ||||
20.3.0 | yes | yes | yes | |||||
20.2.0 | yes | yes | yes | |||||
20.1.0 | yes | yes | yes | |||||
19.4.0(_max/_hpc) | yes | yes | yes | yes | yes | yes | ||
19.3.0 | yes | yes | yes | yes | yes | |||
19.2.0(_max/_hpc) | yes | yes | yes | yes | yes | |||
19.1.0 | yes | yes | yes | yes | ||||
18.1.1(_max/_hpc) | yes | yes | yes | |||||
18.0.1 | yes | yes | ||||||
18.0.0 | yes |
Skip to end of banner
Go to start of banner
Mapping of Intel FPGA SDK for OpenCL versions to Bittware BSP versions
General
Content
Integrations