You can find out the constraint required for an existing bitstream using two commands of the aocl binedit tool, e.g.
module load intelFPGA_pro aocl binedit build/19_3/krn_auto/volume_dummy_v10.aocx print .acl.board aocl binedit build/19_3/krn_auto/volume_dummy_v10.aocx print .acl.board_package
Finding the output values of aocl binedit in the first two columns allows you to identify the constraint to be used.
.acl.board | .acl.board_package | --constraint |
|---|---|---|
| .../20.4.0/hld/board/bittware_pcie/s10 .../19.4.0/hld/board/bittware_pcie/s10 .../19.2.0/hld/board/bittware_pcie/s10 .../19.1/hld/board/bittware_pcie/s10 | bittware_520n_20.4.0_max bittware_520n_19.4.0_max bittware_520n_19.2.0_max bittware_520n_19.1.0_max |
.../18.1.1/hld/board/nalla_pcie .../18.0.1/hld/board/nalla_pcie .../18.0.0/hld/board/nalla_pcie | bittware_520n_18.1.1_max bittware_520n_18.0.1_max bittware_520n_18.0.0_ea | |
| .../20.4.0/hld/board/bittware_pcie/s10_hpc_default .../19.4.0/hld/board/bittware_pcie/s10_hpc_default .../19.2.0/hld/board/bittware_pcie/s10_hpc_default | bittware_520n_20.4.0_hpc bittware_520n_19.4.0_hpc bittware_520n_19.2.0_hpc |
.../20.4.0/hld/board/bittware_pcie/s10 .../19.4.0/hld/board/bittware_pcie/s10 .../19.2.0/hld/board/bittware_pcie/s10 This combination only occurs, when you manually selected the _hpc_ BSP after loading the _max_ module. | bittware_520n_20.4.0_hpc bittware_520n_19.4.0_hpc bittware_520n_19.2.0_hpc | |
.../18.1.1/hld/board/nalla_pcie | bittware_520n_18.1.1_hpc | |
| unsupported, please recompile with supported BSP | |
| unsupported, please recompile with supported BSP |
Unsupported BSPs: Since the 19.1.0 tools, the BSP comes with support for two different target boards: p520_max_sg280l and p520_max_sg280h. These differentiate between boards with so-called L-Tile and H-Tile FPGAs. Our boards contain L-Tile FPGAs, so only use p520_max_sg280l (and p520_hpc_sg280l for selected BSP versions) as targets for synthesis.