Intel FPGA SDK for OpenCL and Bittware BSP version combinations

Usage: select the desired combination of intelFPGA_pro and bittware_520n modules and load both individually

e.g. after loading the fpga gateway module with ml fpga, invoke ml intel/intelFPGA_pro/21.4.0 bittware/520n

For hardware execution, an FPGA node must be allocated with a fitting constraint.

 

bittware/520n modules

 

20.4.0_max/_hpc

19.4.0_max/_hpc

19.2.0_max/_hpc

19.1.0

18.1.1_max/_hpc

18.0.1

18.0.0

intel/opencl_sdk modules

21.4.0

yes, recommended

 

 

 

 

 

 

21.3.0

yes

 

 

 

 

 

 

21.2.0

yes

 

 

 

 

 

 

21.1.0

yes

 

 

 

 

 

 

20.4.0

yes

yes

yes

yes

 

 

 

20.3.0

 

yes

yes

yes

 

 

 

20.2.0

 

yes

yes

yes

 

 

 

20.1.0

 

yes

yes

yes

 

 

 

19.4.0

 

yes

yes

yes

yes

yes

yes

19.3.0

 

 

yes

yes

yes

yes

yes

19.2.0

 

 

yes

yes

yes

yes

yes

19.1.0

 

 

yes

yes

yes

yes

 

The *_max BSP enables the external serial channels and thus offers the default functionality for our setup. The *_hpc BSP does not offer external serial channels, but may enable higher clock frequencies for this tool version.