Description
Intel C, C++ and Fortran compilers (classic and oneAPI)
More information
- Homepage: https://software.intel.com/content/www/us/en/develop/tools/oneapi/hpc-toolkit.html
Available Versions of intel-compilers
Version | Module | Available on |
|---|---|---|
2023.2.1 | compiler/intel-compilers/2023.2.1 | Noctua 1 |
2023.1.0 | compiler/intel-compilers/2023.1.0 | Noctua 1 |
2022.2.1 | compiler/intel-compilers/2022.2.1 | Noctua 1 |
2022.1.0 | compiler/intel-compilers/2022.1.0 | Noctua 1 |
2022.0.1 | compiler/intel-compilers/2022.0.1 | Noctua 1 |
2021.4.0 | compiler/intel-compilers/2021.4.0 | Noctua 1 |
This table is generated automatically. If you need other versions please click pc2-support@uni-paderborn.de.
Usage Hints for intel-compilers
If you need support in using this software or example job scipts please contact pc2-support@uni-paderborn.de.
General options for optimization
-On: control for code optimization
-O0: disable all optimizations (reduce compilation time and useful for debugging)
-O1: enable optimizations for speed and disable some optimizations that increase code size and affect speed
-O2: enable optimizations for speed and vectorization
-O3: perform -O2 optimizations and enable more aggressive loop transformations
-Ofast: set certain aggressive options to improve the speed of your application
-Os: enable -O2 optimizations that do not increase code size
-debug debug-level: enable generation of debugging information
some choices for debug-level are:
none: disable generation of debugging information
minimal: generate line number information for debugging
full: generate complete debugging information
-fp-model fp-semantics: control the semantics of floating-point calculations
some choices for fp-semantics are:
precise: disable optimizations that are not value-safe on floating-point data
fast=1: enable more aggressive optimizations on floating-point data
fast=2: may produce faster and less accurate results
-prec-div: improve precision of floating-point divides
-no-prec-div: enable optimizations that give slightly less precise results
-qopenmp: generate multi-threaded code based on OpenMP directives
-xHost: generate instructions for the highest instruction set available on the compilation host processor
Special option on Noctua 1
The microarchitecture of Intel Xeon Skylake SP 6148 on Noctua 1 is Skylake SP. The AVX-512 instructions are supported. The following compiler options can be used to generate optimized binary executable.
-xCORE-AVX512 -qopt-zmm-usage=high
Special option on Noctua 2
The microarchitecture of AMD Milan 7763 on Noctua 2 is Zen 3. The AVX-2 instructions are supported. The following compiler options can be used to generate optimized binary executable.
-march=core-avx2
or
-axCORE-AVX2